SONET/SDH clock multiplier and jitter attenuator devices provide the industry’s best performance in the smallest footprint. Offering jitter generation of less than 0.3 ps RMS (OC-192/STM-64), these devices outperform discrete implementations and hybrid clock solutions while integrating features such as selectable forward error correction (FEC), frequency scaling, pin-selectable loop filter bandwidths and MTIE-compliant hitless switching. Based on our DSPLL® technology, SONET/SDH ICs provide a fully integrated PLL, eliminating the need for sensitive external loop filter components and costly VCXOs.