TIMING

Timing 201 #12: The Case of the Frequency Scaled Invariant Phase Jitter

Dec. 10, 2024

If you compare phase noise plots for different output clocks from the same device, where the clock frequencies only differ by a scaling ratio N, you may notice that while the phase noise profiles will generally go up or down by 20*log10(N), the RMS phase jitter will be relatively constant.

TIMING

Timing 201 #11: The Case of the Really Slow Jitter – Part 3

July 16, 2024

This Part 3 blog post will conclude this wander metric series by introducing 2 additional members of the Allan Deviation family: Modified Allan Deviation (MDEV) and Time Deviation (TDEV).

ISOLATION

Digital Isolators: What You Need to Know

June 18, 2024

When circuits communicate with one another, there is a chance that they may negatively impact each other. Signals originating from one circuit could damage the destination circuit or cause it to malfunction.

TIMING

Timing 201 #10: The Case of the Really Slow Jitter – Part 2

Oct. 10, 2022

I realized it is best to first understand what led to the predecessor metric Allan Deviation (ADEV). So, that is the topic I will focus on today.

TIMING

Timing 201 #9: The Case of the Really Slow Jitter – Part 1

Oct. 09, 2022

What’s different about wander as opposed to jitter and why do we care? From the perspective of someone who takes a lot of phase noise plots, I consider this the case of the really slow jitter. It’s both slow in terms of phase modulation and in how long it takes to measure.

TIMING

Timing 201 #8: The Case of the Dueling PLLs – Part 2

Oct. 08, 2022

I will discuss in more detail how to calculate the phase noise of both these dual-loop PLL approaches.

TIMING

Timing 201 #7: The Case of the Dueling PLLs – Part 1

Oct. 07, 2022

One consideration is the necessary bandwidth relationship between the inner and outer loops. This topic leads to the play on words in the main title of this blog post, The Case of the Dueling PLLs.

TIMING

Timing 201 #6: The Case of the Autonomously Resetting Clock Generator

Oct. 06, 2022

It turned out that an overlooked spec for a passive component located elsewhere on the board was causing large consequences for the customer’s application. The lessons learned are generally applicable and the subject of this blog article, The Case of the Autonomously Resetting Clock Generator.